ph3Overview /h3pA cover letter outlining your motivation to move to Oslo, Norway is required with submittal of your CV. /ppWe design and verify: timing and control signals for CMOS pixel array readout analog/digital converters; image signal processing (ISP) functions such as black level compensation (BLC), defect pixel correction (DPC), lens correction, and high dynamic range processing; serial and parallel I/O interfaces (e.g. I2C, MIPI) for use in OMNIVISIONS’s Image Sensors. As the designs are targeted for the automotive market, there is also focus on design for safety. The team handles all tasks of the chip development cycle including product specification, architecture definition, RTL design, verification, synthesis, DFT, STA, gate-level-simulation, power analysis optimization, FPGA emulation, chip bring-up, validation debug. /ph3Responsibilities /h3ulliDesign and verification of digital IP for CIS /liliDefine chip level architecture taking into consideration power, performance area trade-offs; build module specification /liliPerform logic synthesis, work with backend team for floor planning, STA and DFT /liliParticipate in project planning and progress tracking /liliFull-chip integration and verification /liliSilicon bring-up, validation and debug /li /ulh3Qualifications /h3ulliMinimum MSEE with 1-2 yrs OR BSEE with 3-4 years of digital design experience /liliExpertise in ASIC design flow: RTL coding, simulation, logic synthesis, STA DFT. /liliKnowledge of all aspects of chip development cycle from design specification, architecture definition, low-power design, tape-out, chip validation and debug /liliKnowledge of assertion-based formal verification is a plus /liliKnowledge of ASIL is a plus /liliImage processing/DSP knowledge is a plus /liliExcellent command of English as a working language /liliAbility to work collaboratively with people across multiple functional areas /li /ul /p #J-18808-Ljbffr
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